hard logic function Definition
A logic function in a design file that is not removed during standard logic synthesis and therefore can be assigned to a physical resource such as a specific device, pin, logic cell, or I/O cell.
In Block Design Files (.bdf) and AHDL, VHDL, and Verilog
HDL files, hard logic primitives/ports include INPUT
, OUTPUT
,
BIDIR
,
LCELL
,
DFF
,
DFFE
,
TFF
,
TFFE
,
JKFF
,
JKFFE
,
SRFF
,
SRFFE
,
LATCH
and their equivalents. However, INPUT
primitives
that do not affect project outputs are not considered to be hard
logic functions. When SOFT
, TRI
, and
OPNDRN
primitives are not removed during logic synthesis, they are also
hard logic primitives. A megafunction or macrofunction that
contains a hard logic primitive is considered to be a hard logic
function.