bypass path Definition
An interconnect structure between I/O cells and adjacent logic cells that improves pin-to-pin delay in MAX® II devices. The bypass path connects only I/O cells to LABs on the edge of the device.
An interconnect structure between I/O cells and adjacent logic cells that improves pin-to-pin delay in MAX® II devices. The bypass path connects only I/O cells to LABs on the edge of the device.