LogicLock® Plus Region Resource Usage Summary Report

Summarizes LogicLock® Plus region statistics for resources used in the design.

All Device Families

The Statistic column lists the type of resource, such as logic utilization, HCells and HCell Macros, clock control blocks, adaptive lookup tables (ALUTs) usage, logic registers, DSP Blocks, registers, adaptive logic module (Adaptive Logic Module (ALM) Definition),Combinational Adaptive Look-Up Table (ALUT) Definition, utilization, logic array block (Logic Array Block (LAB) Definition) utilization, multiplier block Definition, I/O pins, virtual pins Definition, I/O pins, virtual pins Definition, connections, partition interface, congestion, and region placement.

The Root Region and subsequent named LogicLock® Plus region columns display the results of calculations on resources as a fraction indicating the number of resources used divided by the total resource of that type available on the chip. The percentage of that type of resource used by the design is listed after the fraction.