To perform a functional simulation of a VHDL design with command-line commands
- If you have not already done so, set up the Incisive Enterprise Simulator working environment.
- To create a work library in the project directory, type the following command at the command prompt:
mkdir
<work library>Note:Intel recommends using the IES (Verilog or VHDL) default library names when you create a library. You should name the IES software libraries as follows:- When you run the IES software independently from the Quartus® Prime software, you should name your library work.
- When you run the IES software automatically from the Quartus® Prime software, your library is automatically named gate_work under the current project directory, and the work alias is mapped to the gate_work directory.
- Edit the cds.lib and hdl.var files as
follows:
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File Name File Contents Function cds.lib DEFINE <work library> ./work DEFINE LPM <work library> DEFINE ALTERA_MF <work library>
Maps the <work library> to the physical location of the work library, and the variables LPM
andALTERA_MF
to the work library.hdl.var DEFINE WORK <work library>
Maps the IES variable WORK to the <work library>. Note: If you compile a design for device families that have high-speed transceivers (HSSI), the cds.lib must map multiple logical libraries to a physical library that you designate. The VHDL warning message "Multiple logical libraries mapped to a single location" might appear; however, you may ignore this warning because it does not affect simulation. The cds.lib file must contain the following lines with <device family> replaced with the appropriate device family:SOFTINCLUDE ${CDS_INST_DIR}/tools/inca/files/cdsvhdl.lib SOFTINCLUDE ${CDS_INST_DIR}/tools/inca/files/cdsvlog.lib DEFINE work ./<physical library name> DEFINE <device family>_hssi ./<physical library name> DEFINE <device family> ./<physical library name> DEFINE lpm ./<physical library name> DEFINE sgate ./<physical library name>
When defining library names, do not use library names that begin with numeric characters, for example, 220model.
- To compile the appropriate project files and libraries into the
work library, type the following commands at the command prompt
from within the project directory:
ncvhdl /quartus/eda/sim_lib/altera_primitives.vhd ncvhdl /quartus/eda/sim_lib/altera_primitives_components.vhd ncvhdl -v93 -relax -work lpm /quartus/eda/sim_lib/220pack.vhd ncvhdl -v93 -relax -work lpm /quartus/eda/sim_lib/220model.vhd ncvhdl -v93 -work altera_mf /quartus/eda/sim_lib/altera_mf.vhd ncvhdl -v93 -work altera_mf /quartus/eda/sim_lib/altera_mf_components.vhd ncvhdl<test bench file> ncvhdl<design name>.vhd
- To elaborate the design, type the following command at the
command prompt:
ncelab<work library> . <top-level entity name>
- To simulate the design, type the following command at the
command prompt:
ncsim<work library> . <top-level entity name>