VHDL Component Declaration
The following VHDL component declaration is located in the VHDL Design File (.vhd) DefinitionALTERA_MF_COMPONENTS.vhd in the < Quartus® Prime installation directory>\libraries\vhdl\altera_mf directory.
component altufm_parallel
generic (
access_mode : string;
intended_device_family : string := "unused";
erase_time : natural := 500000000;
lpm_file : string := "UNUSED";
osc_frequency : natural := 180000;
program_time : natural := 1600000;
width_address : natural := 9;
width_data : natural := 16;
width_ufm_address : natural := 9;
lpm_hint : string := "UNUSED";
lpm_type : string := "altufm_parallel"
);
port(
addr : in std_logic_vector(width_address-1 downto 0);
data_valid : out std_logic;
di : in std_logic_vector(width_data-1 downto 0) := (others => '0');
do : out std_logic_vector(width_data-1 downto 0);
nbusy : out std_logic;
nerase : in std_logic := '1';
nread : in std_logic;
nwrite : in std_logic := '1';
osc : out std_logic
);
end component;