VHDL Component Declaration
The following VHDL component declaration is located in the VHDL Design File (.vhd) DefinitionALTERA_MF_COMPONENTS.vhd in the < Quartus® Prime installation directory>\libraries\vhdl\altera_mf directory.
component altufm_none
generic (
intended_device_family : string := "unused";
erase_time : natural := 500000000;
lpm_file : string := "UNUSED";
osc_frequency : natural := 180000;
port_arclkena : string := "PORT_UNUSED";
port_drclkena : string := "PORT_UNUSED";
program_time : natural := 1600000;
width_ufm_address : natural := 9;
lpm_hint : string := "UNUSED";
lpm_type : string := "altufm_none"
);
port(
arclk : in std_logic;
arclkena : in std_logic := '1';
ardin : in std_logic;
arshft : in std_logic;
busy : out std_logic;
drclk : in std_logic;
drclkena : in std_logic := '1';
drdin : in std_logic;
drdout : out std_logic;
drshft : in std_logic;
erase : in std_logic;
osc : out std_logic;
oscena : in std_logic;
program : in std_logic;
rtpbusy : out std_logic
);
end component;