Parameters
Parameter |
Type |
Required |
Comments |
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---|---|---|---|---|---|---|---|---|---|---|---|
|
String |
Yes |
Specifies the operation of the RAM. Values are
|
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|
Integer |
Yes |
Specifies the width of the
|
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|
Integer |
Yes |
Specifies the width of the
|
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|
Integer |
No |
Number of words stored in memory. If omitted,
the default is 2 ^ |
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|
String |
No |
Specifies the clock for the |
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|
String |
No |
Specifies the asynchronous clear for the
|
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|
String |
No |
Specifies the asynchronous clear for the
|
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|
String |
No |
Specifies the asynchronous clear for the
|
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|
String |
No |
Specifies the asynchronous clear for the
|
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|
String |
No |
Specifies the asynchronous clear for the
|
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|
Integer |
No |
Specifies the width of the
|
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|
Integer |
No |
Specifies the width of the
|
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|
Integer |
No |
Specifies the width of the
|
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|
Integer |
No |
Number of words stored in memory. If omitted,
the default is 2 ^ |
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|
String |
No |
Specifies the clock for the
|
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|
String |
No |
Specifies the clock for the
Note:
Note: |
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|
String |
No |
Specifies the clock for the
|
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|
String |
No |
Specifies the clock for the
|
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|
String |
No |
Specifies the clock for the
|
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|
String |
No |
Specifies the clock for the |
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|
String |
No |
Specifies the asynchronous clear for the
Specifies the asynchronous clear parameter for
the output latch in
Stratix®III devices when the |
||||||||
|
String |
No |
Specifies the asynchronous clear for the
|
||||||||
|
String |
No |
Specifies the asynchronous clear for the
|
||||||||
|
String |
No |
Specifies the asynchronous clear for the
|
||||||||
|
String |
No |
Specifies the asynchronous clear for the
|
||||||||
|
String |
No |
Specifies asynchronous clear for the
|
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|
Integer |
No |
Specifies the width of the
|
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|
Integer |
No |
Specifies the byte size for the byte-enable mode. Values are: Note:
|
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|
String |
No |
Specifies the behavior when the read and write
operations occur at different ports on the same RAM address. Values
are A value of Compatible parameter values:
|
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|
String |
No |
Specifies the RAM block type. Values are
device family-dependent. Values are |
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|
String |
No |
Name of the Memory Initialization File (.mif) Definition or Hexadecimal (Intel-Format) Output File (.hexout) Definition containing RAM initialization data
( |
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|
String |
No |
Specifies the layout port used with the
initialization file. Values are |
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|
Integer |
No |
Specifies the maximum segmented value of the
RAM. The As the RAM is sliced shallower, the dynamic power usage decreases. For a 128 deep RAM block, the power used by the extra LEs starts to outweigh the power gain achieved by shallower slices. The power usage and RAM/LE usage depends on the RAM configuration, parameter/port usage, and input vectors. |
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|
String |
No |
Specifies the clock enable for all port
|
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READ_DURING_WRITE_MODE_PORT_A |
String |
No |
Specifies the read during write mode for port
|
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READ_DURING_WRITE_MODE_PORT_B |
String |
No |
Specifies the read during write mode for port
|
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|
String |
No |
Specifies whether the ECC feature is on or
off. Values are |
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POWER_UP_UNINITIALIZED |
String |
No |
Specifies whether to initialize memory
content data to XX..X on power-up simulation. Values are
|
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IMPLEMENT_IN_LES |
String |
No |
Specifies the usage of RAM blocks.
Values are |