VHDL Component Declaration

The following VHDL component declaration is located in the VHDL Design File (.vhd) DefinitionALTERA_PRIMITIVES_COMPONENTS.VHD located in the < Quartus^® Prime installation directory>\libraries\vhdl\altera directory.

component alt_iobuf

    generic(

        io_standard           : string  := "NONE";

        current_strength      : string  := "NONE";

        slew_rate             : integer := -1;

        slow_slew_rate        : string  := "NONE";

        location              : string  := "NONE";

        enable_bus_hold       : string  := "NONE";

        weak_pull_up_resistor : string  := "NONE";

        termination           : string  := "NONE";

        input_termination     : string  := "NONE";

        output_termination    : string  := "NONE" );

    port(

        i  : in std_logic;

        oe : in std_logic;

        io : inout std_logic;

        o  : out std_logic);

end component;