LCELL Primitive
The LCELL buffer allocates a logic cell for the
project. The LCELL buffer produces the true and the
complement of a logic function and makes both available to all
logic in the device. (The output of the LCELL buffer
must feed through a NOT gate to use the complement
of the logic function.)
An LCELL buffer always consumes one logic cell. It
is not removed from a project during logic synthesis.
LCELL primitives to create an intentional delay or
asynchronous pulse. The delay of these elements varies with temperature, power supply
voltage, and device fabrication process, so race conditions can occur and create an
unreliable circuit.
You can turn on the Implement as
Output of Logic Cell logic option to insert
LCELL buffers at strategic points in the project
logic. When you turn on the Ignore LCELL
Buffers logic option, the Compiler automatically
converts all LCELL buffers to WIRE primitives.