sld_signaltap Megafunction

Signal Tap Logic Analyzer megafunction. The sld_signaltap megafunction allows you to instantiate Signal Tap Logic Analyzer instances in your design earlier in the design cycle when using the Signal Tap Logic Analyzer and without the need for a Signal Tap File (.stp) Definition. Designs containing Signal Tap Logic Analyzer megafunction instances can be compiled without a Signal Tap File. The sld_signaltap megafunction is available for all Intel device families supported by the Quartus^® Prime software except the MAX series.

To create a Signal Tap File from Signal Tap Logic Analyzer megafunction instances, on the File menu, point to Create/Update and click Create Signal Tap File from Design Instance(s).

Intel recommends instantiating this function with the IP Catalog.

Note:

When you create your megafunction, you can use the IP Catalog to generate a netlist for third-party synthesis tools.

Note: For more information about using the sld_signaltap megafunction with the IP Catalog, refer to the Design Debugging Using the Signal Tap Embedded Logic Analyzer chapter in the Quartus^® Prime Handbook, volume 3, available from the Literature section of the Altera website.