Performing a Timing Simulation with the ModelSim Software

Important:Intel recommends that you set Time scale settings to picoseconds (ps) in the interface or with command-line commands when performing timing simulation.

You can perform a timing simulation of a Verilog HDL or VHDL design with the Mentor Graphics^® ModelSim PE or SE software with the ModelSim interface or with command-line commands.

Note: For more information about using EDA simulators, refer to Mentor Graphics^® ModelSim and QuestaSim Support in the Quartus^® Prime Handbook.

If you want to perform power analysis, perform power analysis with the PowerPlay^® Power Analyzer.