VHDL Component Declaration
The following VHDL component declaration is located in the VHDL Design File (.vhd) DefinitionALTERA_MF_COMPONENTS.vhd in the <Quartus® Prime installation directory>\libraries\vhdl\altera_mf directory.
component altsquare
generic (
data_width : natural;
intended_device_family : string := "unused";
pipeline : natural;
representation : string := "UNSIGNED";
result_width : natural;
lpm_hint : string := "UNUSED";
lpm_type : string := "altsquare"
);
port(
aclr : in std_logic := '0';
clock : in std_logic := '1';
data : in std_logic_vector(data_width-1 downto 0);
ena : in std_logic := '1';
result : out std_logic_vector(result_width-1 downto 0)
);
end component;