Input Ports
Port Name |
Required |
Description |
Comments |
---|---|---|---|
|
Yes |
The clock port that drives the PLL. |
|
|
No |
The Phase-Locked Loop (PLL) Definition enable signal. |
When the |
|
No |
The external feedback input for the PLL. |
To complete the feedback loop, there must be a
board-level connection between the |