Parameters
Parameters |
Type |
Required |
Comments |
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PROTOCOL |
String |
Yes |
Specifies the protocol. Values are |
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NUMBER_OF_CHANNELS |
Integer |
Yes |
Specifies the number of GXB receiver or transmitter channels. Values are
|
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|
String |
Yes |
Specifies the operation of the |
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|
String |
Yes |
Specifies the operation of the loopback.
|
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STARTING_CHANNEL_NUMBER |
Integer |
Yes |
Specifies the index number for the first channel in the GXB. Value must be
in multiples of four beginning with |
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RECEIVER_TERMINATION |
String |
No |
Specifies the receiver data input pin termination value. Values are
|
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TRANSMITTER_TERMINATION |
String |
No |
Specifies the transmitter termination value. Values are
|
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|
Integer |
Yes |
Specifies the width of the |
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|
Integer |
Yes |
Specifies the width of the |
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RX_DIGITALRESET_PORT_WIDTH |
Integer |
No |
Specifies the width of the receiver reset input signals
|
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TX_DIGITALRESET_PORT_WIDTH |
Integer |
No |
Specifies the width of the transmitter reset input signal
|
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RECONFIG_DPRIO_MODE |
Integer |
No |
Specifies the required reconfiguration type. Values are
|
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RECONFIG_PROTOCOL |
String |
No |
Specifies the reconfiguration protocol. Values are "XAUI" ,
"GIGE ", "PIPE" , "SONET ",
"3G_BASIC ", "3G_BASIC" , "6G_BASIC" , and
"CPRI" . If omitted, the default is
"BASIC" . |
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RX_USE_DOUBLE_DATA_MODE |
String |
No |
Specifies whether to use double data width mode. Values are
|
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|
String |
No |
Specifies whether byte serializer is used. Values are
|
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RX_CRU_INCLOCK0_PERIOD |
String |
No |
Specifies the input clock signal period for theclock recovery unit (CRU) Definition
Values are |
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RX_CRU_INCLOCK1_PERIOD |
Integer |
No |
Specifies the input clock signal period, in picoseconds (ps), for the index1
clock source of the CRU. This parameter is available only when the
|
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RX_CRU_INCLOCK2_PERIOD |
Integer |
No |
Specifies the input clock signal period, in picoseconds (ps), for the index2
clock source of the CRU. This parameter is available only when the
|
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RX_CRU_INCLOCK3_PERIOD |
Integer |
No |
Specifies the input clock signal period, in picoseconds (ps), for the index3
clock source of the CRU. This parameter is available only when the
|
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RX_CRU_INCLOCK4_PERIOD |
Integer |
No |
Specifies the input clock signal period, in picoseconds (ps), for the index4
clock source of the CRU. This parameter is available only when the
|
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RX_CRU_INCLOCK5_PERIOD |
Integer |
No |
Specifies the input clock signal period, in picoseconds (ps), for the index5
clock source of the CRU. This parameter is available only when the
|
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RX_CRU_INCLOCK6_PERIOD |
Integer |
No |
Specifies the input clock signal period, in picoseconds (ps), for the index6
clock source of the CRU. This parameter is available only when the
|
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|
Integer |
No |
Specifies the input clock signal period, in picoseconds (ps), for the index7
clock source of the CRU. This parameter is available only when the
|
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|
Integer |
No |
Specifies the input clock signal period, in picoseconds (ps), for the index8
clock source of the CRU. This parameter is available only when the
|
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|
Integer |
No |
Specifies the input clock signal period, in picoseconds (ps), for the index9
clock source of the CRU. This parameter is available only when the
|
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|
Integer |
No |
Specifies the rate of data out from the transmitter after DPRIO reconfiguration in Mbps. |
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|
Integer |
No |
Specifies the remainder of the |
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RX_DPRIO_MODE |
String |
No |
Specifies the DPRIO mode. Values are |
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|
String |
No |
Specifies the DPRIO mode. Values are |
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RX_RECONFIG_CLK_SCHEME |
String |
No |
Specifies the clocking scheme for reconfiguration in the receiver. Values
are |
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|
String |
No |
Specifies the clocking scheme for reconfiguration in the transmitter. Values
are |
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RX_USE_RISING_EDGE_TRIGGERED_PATTERN_ALIGN |
String |
No |
Specifies whether the word aligner realigns continuously or only once per
rising edge of the |
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RX_ENABLE_TRUE_COMPLEMENT_MATCH_IN_WORD_ALIGN |
String |
No |
Specifies whether the word aligner aligns to both true and complement
versions of the programmed pattern, or to only the true versions. Values are
|
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RX_USE_ALIGN_STATE_MACHINE |
String |
No |
Specifies whether the alignment state machine controls the word aligner.
Values are If the
|
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RX_BITSLIP_ENABLE |
String |
No |
Specifies whether the |
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RX_ALIGN_PATTERN |
String |
No |
Specifies the word alignment pattern. The size of the bit vectors is
specified by the value of the |
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RX_ALIGN_PATTERN_LENGTH |
Integer |
No |
Specifies the length of the word alignment pattern. Values are
|
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RX_ALIGN_LOSS_SYNC_ERROR_NUM |
Integer |
No |
Determines the number of bad data words required for the alignment state
machine in the word aligner to enter the loss of synch state, where the
|
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RX_NUM_ALIGN_CONS_GOOD_DATA |
Integer |
No |
Specifies the number of consecutive valid words needed to reduce the
built-up error count by 1. Values are |
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RX_NUM_ALIGN_CONS_PAT |
Integer |
No |
Specifies the number of consecutive patterns needed to achieve
synchronization. Values are |
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RX_RUN_LENGTH |
Integer |
No |
Specifies the maximum number of consecutive 1s or 0s allowed before a run
length violation is reported through the |
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RX_RUN_LENGTH_ENABLE |
String |
No |
Flag that enables run length detection. Values are |
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RX_8B_10B_MODE |
String |
No |
Specifies the 8B/10B decoder/encoder mode for the receiver. Values are
|
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|
String |
No |
Specifies the 8B/10B decoder/encoder mode for the transceiver. Values are
|
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TX_FORCE_DISPARITY_MODE |
String |
No |
Specifies whether to enable disparity for the 8B/10B encoder based on the
|
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TX_FORCE_KCHAR |
String |
No |
Specifies whether the K character transmission is forced from the
transmitter. Values are |
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TX_FORCE_ECHAR |
String |
No |
Specifies whether the E character transmission is forced from the
transmitter. Values are |
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TX_RXDETECT_CTRL |
String |
No |
Specifies 2-bit control. |
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TX_LOW_SPEED_TEST_SELECT |
String |
No |
Specifies 4-bit control. |
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TX_ALLOW_POLARITY_INVERSION |
String |
No |
Specifies whether the polarity inversion is performed using the
tx_invpolarity input signal. Values are |
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TX_ENABLE_SYMBOL_SWAP |
String |
No |
Specifies whether the high and low bytes are swapped after 8B/10B encoding.
Values are |
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TX_PLL_INCLK0_PERIOD |
String |
No |
Specifies the dedicated input clock period, in picoseconds (ps), for the
atom |
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TX_PLL_INCLK0_PERIOD |
String |
No |
Specifies the dedicated input clock period, in picoseconds (ps), for the
atom |
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TX_PLL_VCO_MULTIPLY_BY |
Integer |
No |
Specifies the clock multiplication factor generated by the transmitter PLL. |
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|
Integer |
No |
Specifies the clock division factor generated by the transmitter PLL. |
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|
String |
No |
Specifies the clock multiplication factor generated by the PLL. |
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|
String |
No |
Specifies the clock division factor generated by the PLL. |
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TX_ENABLE_BIT_REVERSAL |
String |
No |
Specifies whether bit ordering output is reversed after 8B/10B encoding.
Values are |
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TX_ENABLE_SELF_TEST_MODE |
String |
No |
Specifies whether the self-test mode is enabled. Values are
|
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TX_SELF_TEST_MODE |
String |
No |
Specifies the self-test mode. Values are |
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TX_FLIP_TX_IN |
String |
No |
Specifies whether the transmitter input data bits are flipped. Values are
|
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TX_USE_CORECLK |
String |
No |
Specifies whether the |
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VOD_CTRL_SETTING |
Integer |
No |
Specifies the VOD switching control signal for various differential
voltages. Values are |
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PREEMPHASIS_CTRL_1STPOSTTAP_SETTING |
Integer |
No |
Specifies the preemphasis control signal for the first post tap. Values are
|
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PREEMPHASIS_CTRL_2NDPOSTTAP_SETTING |
Integer |
No |
Specifies the preemphasis control signal for the second post tap. Values are
|
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PREEMPHASIS_CTRL_PRETAP_SETTING |
Integer |
No |
Specifies the preemphasis control signal for the pretap. Values are
|
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PREEMPHASIS_CTRL_2NDPOSTTAP_INV_SETTING |
String |
No |
Specifies whether the preemphasis control signal for the second post tap is
inverted. Values are |
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PREEMPHASIS_CTRL_PRETAP_INV_SETTING |
String |
No |
Specifies whether the preemphasis control signal for the pretap is inverted.
Values are |
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TX_COMMON_MODE |
String |
No |
Specifies the transmitter common mode voltage. Values are
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TX_ANALOG_POWER |
String |
No |
Specifies the transmitter VCCHTX value. Values are |
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TX_CHANNEL_BONDING |
String |
No |
Specifies the protocol bonding type. Values are |
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CMU_PLL_LOOP_FILTER_RESISTOR_CONTROL |
Integer |
No |
Specifies the 2-bit setting for the PLL bandwidth. Values are
|
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RX_8B_10B_COMPATIBILITY_MODE |
String |
No |
Specifies the 8B/10B encoder/decoder mode for the receiver. Values are
|
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|
String |
No |
Specifies the 8B/10B encoder/decoder mode for the transmitter. Values are
|
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RX_RATE_MATCH_FIFO_MODE |
String |
No |
Specifies the rate matching state machine mode. Values are
|
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RX_RATE_MATCH_PATTERN1 |
String |
No |
Specifies the rate matching pattern in 20-bit binary strings. |
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RX_RATE_MATCH_PATTERN2 |
String |
No |
Specifies the rate matching pattern in 20-bit binary strings. This parameter
is available only when the |
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RX_USE_RATE_MATCH_PATTERN1_ONLY |
String |
No |
Specifies whether the word aligner aligns to the pattern programmed into the
|
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RX_RATE_MATCH_PATTERN_SIZE |
Integer |
No |
Specifies the rate matching pattern size in the
|
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RX_RATE_MATCH_SKIP_SET_BASED |
String |
No |
Specifies whether to skip set-based, as in PCI-Express. Values are
|
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RX_RATE_MATCH_BACK_TO_BACK |
String |
No |
Specifies whether to allow insertion or deletion of consecutive characters
or an ordered set. Values are |
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RX_RATE_MATCH_ORDERED_SET_BASED |
String |
No |
Specifies whether rate matching is ordered set-based equivalent to the
|
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RX_BYTE_ORDERING_MODE |
String |
No |
Specifies the byte ordering mode. Values are
|
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RX_BYTE_ORDER_PLD_CTRL_ENABLE |
String |
No |
Specifies the byte order for the PLD. Values are |
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RX_BYTE_ORDER_PATTERN |
String |
No |
Specifies the byte ordering (SOP) pattern. Values are
|
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RX_BYTE_ORDER_PAD_PATTERN |
String |
No |
Specifies the 10-bit pad pattern at the byte ordering block in 10-bit binary strings. If the deserailization factor is 8/16 bits wide, the byte ordering pad pattern is 8bits. If the 8B/10B encoder/decoder is used, 9bits and the control character should be set at bit 8. If the 8B/10B encoder/decoder is not used and the deserialization factor is 10/20 bits wide, the byte ordering pad pattern is 10 bits. |
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RX_ALLOW_PIPE_POLARITY_INVERSION |
String |
No |
Specifies whether to enable the polarity inversion at the input of the
8B/10B encoder/decoder based on the value of the
|
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|
String |
No |
Specifies whether to disable the idle insertion in the phase
compensation/interface FIFO. Values are |
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|
String |
No |
Specifies whether to enable the self-test mode circuit. Values are
|
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|
String |
No |
Specifies the self-test mode. Values are |
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|
String |
No |
Specifies whether to force signal detection in the receiver's CRU. Values
are |
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|
Integer |
No |
Specifies the parts per million (PPM) setting to measure the frequency
difference between the input clocks. Values are
|
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RX_0PPM_CORE_CLOCK |
String |
No |
Specifies the receiver 0 PPM clock source. Values are
|
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|
String |
No |
Specifies the transceiver 0 PPM clock source. Values are
|
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RX_CRU_USE_REFCLK_PIN |
String |
No |
Specifies that the |
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RX_CRU_REFCLK_MULTIPLY_BY |
String |
No |
Specifies the multiplication factor for the CRU |
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|
String |
No |
Specifies the divide factor for the |
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RX_DATAPATH_LOW_LATENCY_MODE |
String |
No |
Specifies whether the latency mode value for the datapath is set to low for
the receiver. Values are |
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ELEC_IDLE_INFER_ENABLE |
String |
No |
Specifies whether to enable the electrical idle inference selection block.
Values are |
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RX_CDRCTRL_ENABLE |
String |
No |
Specifies whether to enable the CDR control block for the receiver. Values
are |
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RX_CRU_DATA_RATE |
Integer |
No |
Specifies the output period in picoseconds (ps). Output frequency is
|
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|
Integer |
No |
Specifies the bandwidth setting for the receiver PLL. Values are
|
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|
String |
No |
Specifies whether to enable DC coupling to the receiver input pins. Values
are |
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|
Integer |
No |
Specifies the signal detect and the signal loss thresholds for the receiver
input buffer. Values are |
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|
Integer |
No |
Specifies the equalizer control A setting. Values are
|
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|
Integer |
No |
Specifies the equalizer control B setting. Values are
|
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|
Integer |
No |
Specifies the equalizer control C setting. Values are
|
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|
Integer |
No |
Specifies the equalizer control D setting. Values are
|
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|
Integer |
No |
Specifies the equalizer control V setting. Values are
|
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|
String |
No |
Specifies the receiver common mode voltage. Values are
|
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|
String |
No |
Specifies whether to use the |
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|
String |
No |
Specifies whether to use the |
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|
String |
No |
Specifies whether the |
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|
String |
No |
Specifies if the receiver output data bits are flipped. Values are
|
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|
String |
No |
Specifies protocol bonding type. Values are |
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|
String |
No |
Specifies whether the |
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ENABLE_PLL_INCLK0_DIVIDER ENABLE_PLL_INCLK1_DIVIDER ENABLE_PLL_INCLK2_DIVIDER ENABLE_PLL_INCLK3_DIVIDER
|
String |
No |
Specifies whether the |
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|
String |
No |
Specifies whether the calibration block is instantiated in the megafunction.
Values are |
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RX_USE_DESKEW_FIFO |
String |
No |
Specifies whether to enable the deskew FIFO. This parameter can also be
enabled for non-XAUI configurations. Values are |
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RX_ELEC_IDLE_K_DETECT |
String |
No |
Specifies whether to enable K28.7 detection for electrical idle exit
detection. Values are |
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RX_ELEC_IDLE_NUM_COM_DETECT |
Integer |
No |
Specifies the number of commas required to enter or exit electrical idle.
Values are |
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RX_CRU_MULTIPLICATION_VALUE |
Integer |
No |
Specifies the clock multiplication factor generated by the receiver PLL. |
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RX_CRU_MULTIPLY_BY |
Integer |
No |
Specifies the clock multiplication factor generated by the receiver PLL. |
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RX_CRU_PFD_CLK_SELECT |
Integer |
No |
Specifies the active input clock index. |
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RX_CRU_DIVIDE_BY |
Integer |
No |
Specifies the clock division factor generated by the receiver PLL. |
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RX_NUM_ALIGN_CODE_GROUPS_IN_ORDERED_SET |
Integer |
No |
Specifies the number of code groups in an ordered set for word aligner to
consider. Values are |
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RX_ALLOW_ALIGN_POLARITY_INVERSION |
String |
No |
Specifies polarity inversion of data output based on the
Values are
|
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RX_ENABLE_BIT_REVERSAL |
String |
No |
Specifies whether to use reverse bit ordering by the word aligner for data
output based on the |
||||||||||||||||||||||
RX_ENABLE_DEEP_ALIGN_BYTE_SWAP |
String |
No |
Specifies whether to use byte swapping in deep word alignment based on the
|
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RX_DESKEW_PATTERN |
Integer |
No |
Specifies the deskew pattern as a 10-bit integer string. This value is set
when the |
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RX_CUSTOM_DESKEW_PATTERN |
String |
No |
Specifies whether to enable the custom deskew pattern based on the value of
the |
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RX_FORCE_FREQ_DET_LOW |
String |
No |
Specifies whether to force frequency detection to low. Values are
|
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|
String |
No |
Specifies whether to force frequency detection to high. Values are
|
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RX_DISABLE_RUNNING_DISP_IN_WORD_ALIGNER |
String |
No |
Specifies whether to run disparity computation in the word aligner. Values
are |
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RX_RATE_MATCH_ALMOST_EMPTY_THRESHOLD |
Integer |
No |
Specifies the limit at which the rate matching FIFO is considered almost
empty. Values are |
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|
Integer |
No |
Specifies the limit at which the rate matching FIFO is considered almost
full. Values are |
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|
String |
No |
Specifies the adaptive equalization engine mode. Values are
When set to |
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RX_IGNORE_LOCK_DETECT |
String |
No |
Specifies whether to ignore lock detection. Values are
|
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RX_ENABLE_LOCK_TO_REFCLK_SIG |
String |
No |
Specifies whether the CRU locks to the local |
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RX_ENABLE_LOCK_TO_DATA_SIG |
String |
No |
Specifies whether the CRU locks to the data input based on the
|
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RX_INFINIBAND_INVALID_CODE |
String |
No |
Specifies the invalid code setting for infiniband. Values are
|
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RX_FORCE_SIGNAL_DETECT_DIG |
String |
No |
Specifies whether word aligner forces signal detection. Values are
|
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RX_INSERT_PAD_ON_UNDERFLOW |
String |
No |
Specifies whether to insert a pad is on underflow. Values are
|
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EQUALIZER_DCGAIN_SETTING |
Integer |
No |
Specifies the equalizer gain. Values are 3:3db 6 : 6 db 9 : 9 db
|
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RX_USE_CORECLK |
String |
No |
Specifies whether to use the |
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CMU_OFFSET_ALL_ERRORS_ALIGN |
String |
No |
Specifies whether to align offset errors in the central management unit
(CMU). Values are |
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USE_GLOBAL_CLK_DIVIDER |
String |
No |
Specifies whether the CMU clock divider is used. Values are
|
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ENABLE_0PPM |
String |
No |
Enables the PCIE low latency mode. |
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TX_PLL_PFD_CLK_SELECT |
Integer |
Yes |
Specifies the active |
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TX_PLL_USE_REFCLK_PIN |
String |
No |
Specifies whether the |
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|
Integer |
No |
Specifies the |
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TX_PLL_REFCLK_DIVIDE_BY |
Integer |
No |
Specifies the divide factor for the |
||||||||||||||||||||||
TX_DATAPATH_LOW_LATENCY_MODE |
String |
No |
Specifies whether the latency mode value for the datapath is set to low for
the transceiver. Values are |
||||||||||||||||||||||
TX_PLL_VCO_DATA_RATE |
Integer |
No |
Specifies the VCO base output period in picoseconds (ps). Output frequency
is |
||||||||||||||||||||||
TX_PLL_DATA_RATE |
Integer |
No |
Specifies the output period in picoseconds (ps). Output frequency is
|
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gen_reconfig_pll |
String |
No |
Specifies whether to generate a secondary PLL for the reconfiguration.
Values are |
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tx_use_serializer_double_data_mode |
String |
No |
Specifies the bit width from the interface to the serializer. Values are
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cmu_pll_log_index |
Integer |
No |
Specifies the logical index for primary PLL. Integer value 0 and 1.
Applicable only when |
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cmu_pll_reconfig_log_index |
Integer |
No |
Specifies the logical index for secondary PLL. Integer value 0 and 1.
Applicable only when |
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cmu_pll_inclk_log_index |
Integer |
No |
Specifies which input clock source is selected by the primary CMU PLL.
Integer value from 0 until 6. The default is |
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cmu_pll_reconfig_inclk_log_index |
Integer |
No |
Specifies which input clock source is selected by the secondary CMU PLL.
Integer value from 0 until 6. The default is |
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enable_reconfig_pll_inclk_drive_rx |
String |
No |
Specifies whether the CRU is driven by the same input clock source of the
CMU PLL. Values are |
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reconfig_pll_inclk_width |
Integer |
No |
Specifies the width of the |
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reconfig_calibration |
String |
No |
Specifies whether RX calibration is enabled. Values are
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enable_pma_direct |
String |
No |
Specifies whether PMA-direct mode is enabled. Values are
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enable_pma_xn_bonding |
String |
No |
Specifies whether to enable xN bonding for PMA-direct mode. Values are
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enable_lc_tx_pll |
String |
No |
Specifies whether to enable the ATX PLL. Values are |
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tx_phfiforegmode |
String |
No |
Specifies whether to enable TX PCS |
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tx_bitslip_enable |
String |
No |
Specifies whether to enable the bit slip feature for all modes. Values are
|
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pll_pfd_fb_mode |
String |
No |
Specifies the source of the PFD feedback clock on the TX PLL. Values are
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advanced_calibration_clocking |
String |
No |
Specifies whether to expose |