VHDL Component Declaration

The following VHDL component declaration is located in theVHDL Design File (.vhd) DefinitionALTERA_PRIMITIVES_COMPONENTS.VHDlocated in the<Quartus^® Prime installation directory>\libraries\vhdl\alteradirectory.

component carry_sum

    port (

        sin : in std_logic;

        cin : in std_logic;

        sout : out std_logic;

        cout : out std_logic );

end component;