Set Multicycle Path Dialog Box (set_multicycle_path)

You access this dialog box by clicking Set Multicycle Path on the Constraints menu in the TimeQuest Timing Analyzer, or with the set_multicycle_path Synopsys Design Constraints (SDC) command.

Allows you to define a path that requires more that one clock cycle to propagate data. You can specify the number of clock periods before a source register launches the data or a destination register latches the data. You can specify the source elements (-from), common through elements (- thru), and destination (-to) elements of the path included in the multicycle path. You can specify a separate multicycle value for setup and recovery checks (-setup) or hold and removal checks (-hold), and whether the multicycle value is relative to the source clock waveform (-start) or the destination clock waveform (-end).

Figure: Multicycle (-end)

Multicycle (-start)

The following sections provide more information about specifying options for this constraint:

If you specify a clock as the collection for the source (-from) element, you must specify a clock for the collection in the destination (-to) element. Applying exceptions between clocks applies the exception from all registers or ports clocked by the source (-from) clock to all registers or ports clocked by the destination (-to) clock. Applying exceptions between clocks is more efficient than applying them for specific paths.

If you specify pin names or collections of pins, the source (-from) element must be a clock pin, and the destination (-to) value must be any non-clock input pin to a register. Constraints from clock pins, or to and from cells, apply to all registers in the cell or those clocked by the clock pin.

To report paths with multicycle constraints and other paths included in timing exceptions, use the Report Exceptions dialog box.

From (-from):

Specifies the source in a path to which the timing constraint or exception applies. You can use the Name Finder (...) to specify a source.

Through (-thru):

Specifies the common through elements ( collection Definition of pins or nets in the design) in a path to which the timing constraint or exception applies. You can use the Name Finder (...) to build a collection.

Note: You cannot set this option if you specify clocks for the source (-from) or destination (-to) elements.

Analysis type (-setup, -hold):

Allows you to specify the analysis type. The following options are available:

  • Setup (-setup)— Allows you to specify a multicycle value for clock setup or recovery checks.
  • Hold (-hold)— Allows you to specify a multicycle value for clock hold or removal checks.

Reference clock (-start, -end):

Specifies whether the multicycle value is based on the source or destination clock waveform.

  • Start (launch clock)(-start)— Multicycle value is relative to the source clock waveform.
  • End (latch clock)— Multicycle value is relative to the destination clock waveform.

Value:

Specifies the number of clock periods before a source register launches the data or a destination register latches the data.

Name Finder:

Opens the Name Finder dialog box, which allows you to build collection Definition of design elements to which you can assign constraints and report timing data.

SDC command:

Displays and allows you to enter SDC commands for the options you specify in this dialog box.