Generating a Netlist for Third-Party Synthesis Tools from Megafunctions and MegaCore Functions

You can direct the IP Catalog to generate a special, non-functional Verilog Design File (.v) Definition netlist for use by some third-party EDA synthesis tools to estimate timing and resource usage for your megafunction or MegaCore functions Definition. This option is available for all megafunctions and most MegaCore functions. The generated netlist file name is <variation>_syn.v.

To generate a netlist from a megafunction or from a MegaCore function using the IP Catalog, follow these steps:

  1. Launch the IP Catalog and begin creating your megafunction or MegaCore function.
  2. On the EDA tab, under Timing and resource estimation, turn on Generate netlist.
  3. Click Next to continue creating your megafunction or MegaCore function.
Note:

For MegaCore functions that do not have an EDA tab, click Set Up Simulation on the toolbar, and in the Setup Simulation dialog box, turn on Generate netlist.