All clock signals in a design should be global signals. A non-global clock signal can be slower and have a larger skew than global signals because regular routing resources must distribute the non-global clock signal.
You can use the Global Signal logic option to specify that a clock signal is a global signal. You can also use the Auto Global Clock logic option to allow the Fitter to automatically choose clock signals as global signals; the Fitter may automatically choose all the clock signals as global signals.
If a design contains more clock signals than you can specify as global signals for the current device, you should reduce the number of clock signals in the design. If, however, the design must use more clock signals than you can specify as global signals, implement the clock signals with the lowest fan-out using regular routing resources. Also, implement the fastest clock signals as global signals.
To specify the number of fan-outs above which you want the Design Assistant to report nodes, click Global Clock Threshold Setting to open the dialog box and type the number in the Report all nodes with more than < n > fan-outs box.
For designs that target MAX3000 or MAX7000 devices, this rule applies either after Analysis & Synthesis synthesizes the design or after the Fitter processes the design. For all other designs, this rule applies only after the Fitter processes the design.