TFF Primitive
The
SRFF
primitive allows you to program a register as an edge-triggered SR flipflop.
Note:
For information about
Quartus
®
Prime Standard Edition
primitive instantiation, go to Using a
Quartus
®
Prime Standard Edition
Logic Function.
AHDL Function Prototype
Simulation Library
Verilog HDL Example Instantiation
VHDL Component Declaration
VHDL LIBRARY-USE Declaration
Inputs/Output