The New Project Wizard allows you to specify the working directory for the project, assign the project name, and designate the name of the top-level design entity. When you name the project, the same name is automatically assigned to the top-level design entity. If you want the name of the top-level design entity to be unique, you can rename the top-level design entity. You can also specify which design files, other source files, user libraries, and EDA tools you want to use in the project, as well as the target device family and device. If you have no files to add when creating a new project, or want to add files at a later time, or if you do not wish to specify EDA tools at this time, you can bypass these steps in the New Project wizard.
After successfully performing analysis and synthesis or fully compiling a project, the Project Navigator organizes project information on the Hierarchy,File, and Design Unit, andIP Components tabs. You can use the Settings dialog box to add and remove files, or project, or to specify the compilation order of project files.
You can modify projects by specifying the top-level entity, user libraries, the Library Mapping File (. lmf) for simulating VHDL or Verilog HDL input files, EDA settings, default logic options, project-wide parameters and timing requirements, or Compiler and Simulator settings.
To create a new project using the New Project Wizard: