The Assignment Editor allows you to assign logic and other options to device resources such as nodes and buses. Use the Pin Planner to assign logic or options to device I/O pins. Your assignments impact synthesis and fitting during Quartus® Prime compilation. Node and entity-level assignments you create with the Assignment Editortake precedence over any project-wide assignments to the same nodes and entities.
The Assignment Editor saves your assignments in a text-based Quartus® Prime Settings File (.qsf) in the project directory for each revision of your project. The Quartus® Prime software appends new assignments at the end of the file.
Timing assignments you create with the TimeQuest Timing Analyzer, are saved in a separate Synopsys Design Constraints File (.sdc).