Register Fields for PL32G_CAP/PL32G_STATUS_REG
Field Name | Bit Offset |
---|---|
EQ_32G_CPL | 0 |
EQ_32G_CPL_P1 | 1 |
EQ_32G_CPL_P2 | 2 |
EQ_32G_CPL_P3 | 3 |
LINK_EQ_32G_REQ | 4 |
MOD_TS_RCVD | 5 |
RX_ENH_LINK_BEHAVIOR_CTRL | 6 |
TX_PRECODING_ON | 8 |
TX_PRECODE_REQ | 9 |
NO_EQ_NEEDED_RCVD | 10 |
RSVDP_11 | 11 |