DIEPTSIZ8
Device IN Endpoint 8 Transfer Size Register
Module Instance | Base Address | Register Address |
---|---|---|
i_usbotg_0_DWC_otg_intreg | 0xFFB00000 | 0xFFB00A10 |
i_usbotg_1_DWC_otg_intreg | 0xFFB40000 | 0xFFB40A10 |
Size: 32
Offset: 0xA10
Access: RW
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED RO 0x0 |
MC RW 0x0 |
PktCnt RW 0x0 |
XferSize RW 0x0 |
||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
XferSize RW 0x0 |
DIEPTSIZ8 Fields
Bit | Name | Description | Access | Reset | ||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|
31 | RESERVED |
RESERVED |
RO | 0x0 | ||||||||
30:29 | MC |
Applies to IN endpoints only. For periodic IN endpoints, this field indicates the number of packets that must be transmitted per microframe on the USB. The core uses this field to calculate the data PID for isochronous IN endpoints. 2'b01: 1 packet 2'b10: 2 packets 2'b11: 3 packets For non-periodic IN endpoints, this field is valid only in Internal DMA mode. It specifies the number of packets the core must fetchfor an IN endpoint before it switches to the endpoint pointed to by the Next Endpoint field of the Device Endpoint-n Control register (DIEPCTLn.NextEp)
|
RW | 0x0 | ||||||||
28:19 | PktCnt |
Packet Count (PktCnt) Indicates the total number of USB packets that constitute the Transfer Size amount of data For endpoint 0. This field is decremented every time a packet (maximum size or short packet) is read from the TxFIFO. |
RW | 0x0 | ||||||||
18:0 | XferSize |
Transfer Size (XferSize) Indicates the transfer size in bytes For endpoint 0. The core interrupts the application only after it has exhausted the transfer size amount of data. The transfer size can be Set to the maximum packet size of the endpoint, to be interrupted at the end of each packet. The core decrements this field every time a packet from the external memory is written to the TxFIFO. |
RW | 0x0 |