flashcmdwrdataup

Module Instance	Base Address	Register Address
`sdm_qspi_qspiregs`	`0xFF8D2000`	`0xFF8D20AC`

Size: 32

Offset: 0xAC

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`data` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`data` `RW 0x0`

flashcmdwrdataup Fields

Bit	Name	Description	Access	Reset
31:0	`data`	This is the command write data upper byte. This should be setup before triggering the command with execute field (bit 0) of the Flash Command Control register. It is the data that is to be written to the flash for any status or configuration write operation carried out by triggering the event in the Flash Command Control register.	`RW`	`0x0`

Bit

Name

Description

Access

Reset

31:0

data

 This is the command write data upper byte. This should be setup before triggering the command with execute field (bit 0) of the Flash Command Control register. It is the data that is to be written to the flash for any status or configuration write operation carried out by triggering the event in the Flash Command Control register.

RW

0x0