re_2_we

         Timing parameter between re high to we low (Trhw)

Module Instance	Base Address	Register Address
`sdm_i_nand_config`	`0xFFA10000`	`0xFFA10120`

Size: 32

Offset: 0x120

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`Reserved`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`Reserved`										`value` `RW 0x32`

re_2_we Fields

Bit	Name	Description	Access	Reset
5:0	`value`	Signifies the number of bus interface clk_x clocks that should be introduced between read enable going high to write enable going low. The number of clocks is the function of device parameter Trhw and controller clock frequency.	`RW`	`0x32`

Bit

Name

Description

Access

Reset

5:0

value

Signifies the number of bus interface clk_x clocks that should be introduced between 
                          read enable going high to write enable going low. The number of clocks is the 
                          function of device parameter Trhw and controller clock frequency.

RW

0x32