HCON 

         
Name: Hardware Configuration Register
Size: 32 bits
Address Offset: 0x70
Read/Write access: readHardware Configuration Register
Module Instance Base Address Register Address
sdm_i_sdmmc_sdmmc_block 0xFF8D1000 0xFF8D1070

Size: 32

Offset: 0x70

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

ADDR_CONFIG

RO 0x0

AREA_OPT

RO 0x0

NUM_CLK_DIC

RO 0x0

FALSE_PATH

RO 0x1

HOLD_REG

RO 0x1

FIFO_RAM_IN

RO 0x0

GE_DMA_DATA_WIDTH

RO 0x1

DMA_IF

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

H_ADDR_WIDTH

RO 0xC

H_DATA_WIDTH

RO 0x1

BUS_TYPE

RO 0x0

NUM_CARD

RO 0x0

CARD_TYPE

RO 0x1

HCON Fields

Bit Name Description Access Reset
27 ADDR_CONFIG 
Address configuration
Value Description
0x0 32-bit addressing supported
0x1 64-bit addressing supported
RO 0x0
26 AREA_OPT 
Area Optimization
Value Description
0x0 no area optimization
0x1 Area optimization
RO 0x0
25:24 NUM_CLK_DIC 
NUM_CLK_DIVIDER - 1
 RO 0x0
23 FALSE_PATH 
Set Clock False Path
Value Description
0x0 no false path
0x1 false path set
RO 0x1
22 HOLD_REG 
Implement HOLD register
Value Description
0x0 no hold register
0x1 hold register
RO 0x1
21 FIFO_RAM_IN 
FIFO Ram Inside
Value Description
0x0 Outside
0x1 Inside
RO 0x0
20:18 GE_DMA_DATA_WIDTH 
Generic DMA Data Width
000 - 16 bits
001 - 32 bits
010 - 64 bits
others - reserved
 RO 0x1
17:16 DMA_IF 
DMA Interface
Value Description
0x0 None
0x1 DW DMA
0x2 Generic DMA
0x3 Non DW DMA
RO 0x0
15:10 H_ADDR_WIDTH 
H Address Width
00 to 7  reserved
8  9 bits
9  10 bits
…
31  32 bits
32 to 63  reserved
 RO 0xC
9:7 H_DATA_WIDTH 
H Data Width
000 - 16 bits
001 - 32 bits
010 - 64 bits
others - reserved
 RO 0x1
6 BUS_TYPE 
Bus type
Value Description
0x0 APB Bus
0x1 AHB bus
RO 0x0
5:1 NUM_CARD 
NUM_CARD - 1
 RO 0x0
0 CARD_TYPE 
Card type
Value Description
0x0 MMC Only
0x1 SD MMC
RO 0x1