IP_REV_ID2 

         IP memory configuration
Module Instance Base Address Register Address
ecc_emac2_tx_ecc_registerBlock 0xFF8C1400 0xFF8C1404

Size: 32

Offset: 0x4

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

LUT_TBL_DEP

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RAM_TYPE

RO 0x0

ECC_SIZE

RO 0x0

DAT

RO 0x0

ADDR

RO 0x0

IP_REV_ID2 Fields

Bit Name Description Access Reset
19:16 LUT_TBL_DEP 
Lookup Table Depth.
<br />1 - 4 words (less than or equal) 64KB RAM size
2 - 8 words (less than or equal) 128KB RAM size
4 - 16 words (less than or equal) 256KB RAM size
8 - 20 words (less than or equal) 512KB RAM size
Others - UNUSED
 RO 0x0
15:13 RAM_TYPE 
Defines RAM type.
1 - single port
2 - simple dual port
3 - true dual port
Others - UNUSED
 RO 0x0
12:10 ECC_SIZE 
ECC Size.
Total number of ECC bits is dependent on the number of encoder/decoder implemented. This is specifying the width of the ECC syndrome.
1 - syndrome is 5 bits
2 - syndrome is 6 bits
3 - syndrome is 7 bits
4 - syndrome is 8 bits
Others - UNUSED
 RO 0x0
9:5 DAT 
Data Width. This field indicates the IP RAM data width. Refer to IP spec for exact data width size.
0 - 8 bits
1 - 16 bits
2 - 32 bits
3 - 35 bits
4 - 64 bits
5 - 128 bits
6 - 256 bits
7 - 512 bits
Others - UNUSED
 RO 0x0
4:0 ADDR 
Number of address bits (This represent the memory size)Support 32 - 0 address bits.
For example:
10 - 1Kbytes memory size 2^10 - 1K
15 - 32Kbytes memory size 2^15 - 32K
 RO 0x0