reg_3ds2
Module Instance Base Address Register Address
iohmc_ctrl_inst_0_iohmc_ctrl_mmr_top_inst 0xF8010000 0xF801012C

Size: 32

Offset: 0x12C

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

cfg_chip_id

RW 0x0

reg_3ds2 Fields

Bit Name Description Access Reset
8:0 cfg_chip_id 
iohmc_ctrl_mmr_top_inst.cfg_chip_id[8:0]
Name:3DS Chip ID Mapping
Description:Configure this register to change 3DS pin mapping
[8:6] – CID[2] map
[5:3] – CID[1] map
[2:0] – CID[0] map
where
[8] – Map CID[2] to default CID[2] pin
[7] – Map CID[2] to default CID[1] pin
[6] – Map CID[2] to default CID[0] pin
[5] – Map CID[1] to default CID[2] pin
[4] – Map CID[1] to default CID[1] pin
[3] – Map CID[1] to default CID[0] pin
[2] – Map CID[0] to default CID[2] pin
[1] – Map CID[0] to default CID[1] pin
[0] – Map CID[0] to default CID[0] pin
RW 0x0