MWCR

         Microwire Control Register.
This register controls the direction of the data word for the half-duplex
Microwire serial protocol. It is impossible to write to this register
when the DW_apb_ssi is enabled. The DW_apb_ssi is enabled and disabled by
writing to the SSIENR register.

Module Instance	Base Address	Register Address
`i_spis_0_ssi_address_block`	`0xFFDA2000`	`0xFFDA200C`
`i_spis_1_ssi_address_block`	`0xFFDA3000`	`0xFFDA300C`

Size: 32

Offset: 0xC

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`RSVD_MWCR` `RO 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`RSVD_MWCR` `RO 0x0`													`RSVD_MHS` `RO 0x0`	`MDD` `RW 0x0`	`MWMOD` `RW 0x0`

MWCR Fields

Bit

Name

Description

Access

Reset

31:3

RSVD_MWCR

Reserved bits - Read Only

RO

0x0

RSVD_MHS

Reserved field- read-only

RO

0x0

MDD

Microwire Control.
Defines the direction of the data word when the Microwire serial protocol
is used. When this bit is set to 0, the data word is received by the
DW_apb_ssi MacroCell from the external serial device. When this bit is
set to 1, the data word is transmitted from the DW_apb_ssi MacroCell to
the external serial device.

Value	Description
0x0	SSI receives data
0x1	SSI transmits data

RW

0x0

MWMOD

Microwire Transfer Mode.
Defines whether the Microwire transfer is sequential or non-sequential.
When sequential mode is used, only one control word is needed to
transmit or receive a block of data words. When non-sequential mode is
used, there must be a control word for each data word that is
transmitted or received.
0: non-sequential transfer
1: sequential transfer

Value	Description
0x0	Non-Sequential Microwire Transfer
0x1	Sequential Microwire Transfer

RW

0x0