die_mask 

         Indicates the die differentiator in case of NAND devices with stacked dies.
Module Instance Base Address Register Address
sdm_i_nand_config 0xFFA10000 0xFFA10260

Size: 32

Offset: 0x260

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

value

RW 0x0

die_mask Fields

Bit Name Description Access Reset
15:0 value 
The die_mask register information will be used for devices having address restrictions.
                           For example, in certain Samsung devices, when the first address in a two-plane command
                           is being sent, it is expected that the address is all zeros. But if the NAND device 
                           internally has multiple dies stacked, the die information (MSB of final row address) has
                           to be sent.
                           The value programmed in this register will be used to mask the address while sending
                           out the last row address.
RW 0x0