prefetch_mode

         Enables read data prefetching to faster performance

Module Instance	Base Address	Register Address
`sdm_i_nand_config`	`0xFFA10000`	`0xFFA100C0`

Size: 32

Offset: 0xC0

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`Reserved`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`prefetch_burst_length` `RW 0x0`												`Reserved`			`prefetch_en` `RW 0x1`

prefetch_mode Fields

Bit	Name	Description	Access	Reset
15:4	`prefetch_burst_length`	If prefetch_en is set and prefetch_burst_length is set to ZERO, the controller will start prefetching data only after the receiving the first Map01 read command for the page. If prefetch_en is set and prefetch_burst_length is set to a non-ZERO, valid value, the controller will start prefetching data corresponding to this value even before the first Map01 for the current page has been received. The value written here should be in bytes.	`RW`	`0x0`
0	`prefetch_en`	Enable prefetch of Data	`RW`	`0x1`

Bit

Name

Description

Access

Reset

15:4

prefetch_burst_length

If prefetch_en is set and prefetch_burst_length is set to ZERO, the controller will
                  start prefetching data only after the receiving the first Map01 read command for the page.
                  If prefetch_en is set and prefetch_burst_length is set to a non-ZERO, valid value, 
                  the controller will start prefetching data corresponding to this value even before 
                  the first Map01 for the current page has been received.
                  The value written here should be in bytes.

RW

0x0

prefetch_en

Enable prefetch of Data

RW

0x1