ddr_T_main_Probe_StatAlarmStatus
DDR Main Probe Statistics Alarm Status Register
| Module Instance | Base Address | Register Address |
|---|---|---|
| soc_ddr_scheduler_inst_0_ddr_T_main_Probe | 0xF8000000 | 0xF8000034 |
Size: 32
Offset: 0x34
Access: RO
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
|
Reserved |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|
Reserved |
STATALARMSTATUS RO 0x0 |
||||||||||||||
ddr_T_main_Probe_StatAlarmStatus Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 0 | STATALARMSTATUS |
Register StatAlarmStatus is a read-only 1-bit register indicating that at least one statistics counter has exceeded the programmed values for registers StatAlarmMin or StatAlarmMax. Output signal StatAlarm is equal to the values stored in register MainCtl fields StatAlarmStatus and AlarmEn. When parameter statisticsCounterAlarm is set to False, StatAlarmStatus is reserved. |
RO | 0x0 |