wrprot
| Module Instance | Base Address | Register Address |
|---|---|---|
| sdm_qspi_qspiregs | 0xFF8D2000 | 0xFF8D2058 |
Size: 32
Offset: 0x58
Access: RW
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
|
wr_prot_ctrl_resv_fld RO 0x0 |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|
wr_prot_ctrl_resv_fld RO 0x0 |
en RW 0x0 |
inv RW 0x0 |
|||||||||||||
wrprot Fields
| Bit | Name | Description | Access | Reset | ||||||
|---|---|---|---|---|---|---|---|---|---|---|
| 31:2 | wr_prot_ctrl_resv_fld | RO | 0x0 | |||||||
| 1 | en |
When set to 1, any AHB write access with an address within the protection region defined in the lower and upper write protection registers is rejected. An AHB error response is generated and an interrupt source triggered. When set to 0, the protection region is disabled.
|
RW | 0x0 | ||||||
| 0 | inv |
When set to 1, the protection region defined in the lower and upper write protection registers is inverted meaning it is the region that the system is permitted to write to. When set to 0, the protection region defined in the lower and upper write protection registers is the region that the system is not permitted to write to.
|
RW | 0x0 |