GPIO_SWPORTA_DDR

         Name: Port A Data Direction Register
Size: 1-32 bits
Address Offset: 0x04
Read/Write Access: Read/Write
      
Module Instance Base Address Register Address
sdm_gpio_DW_apb_gpio_addr_block 0xFF8D0300 0xFF8D0304

Size: 32

Offset: 0x4

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

GPIO_SWPORTA_DDR

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

GPIO_SWPORTA_DDR

RW 0x0

GPIO_SWPORTA_DDR Fields

Bit Name Description Access Reset
23:0 GPIO_SWPORTA_DDR
Values written to this register independently control the
direction of the corresponding data bit in Port A. The
default direction can be configured as input or output after
system reset through the GPIO_DFLT_SRC_A parameter.
0  Input (default)
1  Output

DO NOT PUBLISH BELOW THIS LINE
For internal usage only, [0:18] for SDM, [0:23] for HPS
Value Description
0x0 Input Direction
0x1 Output Direction
RW 0x0