multiplane_addr_restrict

         Address restriction for multiplane commands 
      
Module Instance Base Address Register Address
sdm_i_nand_config 0xFFA10000 0xFFA101A0

Size: 32

Offset: 0x1A0

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

flag

RW 0x0

multiplane_addr_restrict Fields

Bit Name Description Access Reset
0 flag
This flag must be set for devices which require that during multiplane
                                          operations all but the address for the last plane should have their address
                                          cycles tied low. The last plane address cycles has proper values. This
                                          ensures multiplane address restrictions in the device.
RW 0x0