ddr_T_main_Probe_Filters_1_Urgency

         DDR Main Probe Filter 1 Urgency Register
      
Module Instance Base Address Register Address
soc_ddr_scheduler_inst_0_ddr_T_main_Probe 0xF8000000 0xF80000A8

Size: 32

Offset: 0xA8

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

FILTERS_1_URGENCY

RW 0x0

ddr_T_main_Probe_Filters_1_Urgency Fields

Bit Name Description Access Reset
1:0 FILTERS_1_URGENCY
Register Urgency contains the minimum urgency level used to filter packets. A packet is a candidate when its socket urgency is greater than or equal to the urgency specified in the register.
RW 0x0