reg_sbcfg0

         
      
Module Instance Base Address Register Address
iohmc_ctrl_inst_0_iohmc_ctrl_mmr_top_inst 0xF8010000 0xF801005C

Size: 32

Offset: 0x5C

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

cfg_rld3_refresh_seq1

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

cfg_rld3_refresh_seq0

RW 0x0

cfg_self_rfsh_dqstrk_en

RW 0x0

cfg_cb_pdqs_perf_fix_disable

RW 0x0

cfg_cb_3ds_mixed_height_req_fix

RW 0x0

cfg_cb_en_mrnk_rd_fix

RW 0x0

cfg_cb_3ds_mixed_height_ref_ack_disable

RW 0x0

cfg_cb_en_cmd_valid_ungate_fix

RW 0x0

cfg_cb_revert_ref_qual

RW 0x0

cfg_exit_pdn_for_dqstrk

RW 0x0

cfg_no_of_ref_for_self_rfsh

RW 0x0

reg_sbcfg0 Fields

Bit Name Description Access Reset
31:16 cfg_rld3_refresh_seq1
iohmc_ctrl_mmr_top_inst.cfg_rld3_refresh_seq1[15:0]
Name:Reserved
Description:TBD
RW 0x0
15:12 cfg_rld3_refresh_seq0
iohmc_ctrl_mmr_top_inst.cfg_rld3_refresh_seq0[3:0]
Name:Reserved
Description:TBD
RW 0x0
11 cfg_self_rfsh_dqstrk_en
iohmc_ctrl_mmr_top_inst.cfg_self_rfsh_dqstrk_en
Name:Enable DQS Tracking After Self Refresh Exit
Description:When set to 1, enable DQS Tracking after Self Refresh exit.
When set to 0, disable DQS Tracking after Self Refresh exit.
RW 0x0
10 cfg_cb_pdqs_perf_fix_disable
iohmc_ctrl_mmr_top_inst.cfg_cb_pdqs_perf_fix_disable
Name:Periodic DQS Tracking Performance Chicken Bit
Description:When set to 0, enable fix where Periodic DQS Tracking is issued earlier.
When set to 1, disable fix where Periodic DQS Tracking is issued after a fixed delay.
RW 0x0
9 cfg_cb_3ds_mixed_height_req_fix
iohmc_ctrl_mmr_top_inst.cfg_cb_3ds_mixed_height_req_fix
Name:3DS Mixed Height Physical Staggering Off Disable Precharge to non-existent Lower Logical Rank Chicken Bit
Description:When set to 0, enable fix where iohmc does not Precharge non existent Logical Rank in Physical Staggering Off Mode
When set to 1, disable fix where iohm Precharge non existent Logical Rank in Physical Staggering Off Mode.
RW 0x0
8 cfg_cb_en_mrnk_rd_fix
iohmc_ctrl_mmr_top_inst.cfg_cb_en_mrnk_rd_fix
Name:Chicken bit for read mrnk fix
Description:Set to 1’b1 to enable fix.
RW 0x0
7 cfg_cb_3ds_mixed_height_ref_ack_disable
iohmc_ctrl_mmr_top_inst.cfg_cb_3ds_mixed_height_ref_ack_disable
Name:3DS Mixed Height Physical Staggering Off Refresh Ack Chicken Bit
Description:When set to 0, enable fix for 3DS Mixed Height Physical Staggering Off Refresh Ack where iohmc refers to respective cfg_lr_num* for Refresh Ack assertion
When set to 1, disable fix for 3DS Mixed Height Physical Staggering Off Refresh Ack where iohmc refers to cfg_lr_num0 for Refresh Ack assertion.
RW 0x0
6 cfg_cb_en_cmd_valid_ungate_fix
iohmc_ctrl_mmr_top_inst.cfg_cb_en_cmd_valid_ungate_fix
Name:Chicken bit for command valid ungated fix
Description:Set to 1’b1 to enable fix.
RW 0x0
5 cfg_cb_revert_ref_qual
iohmc_ctrl_mmr_top_inst.cfg_cb_revert_ref_qual
Name:Refresh and Self Refresh Behaviour Chicken Bit
Description:When set to 0, do_refresh is ignored for Refresh state machine transition.
When set to 1, do_refresh is considered for Refresh state machine transition similar to Nightfury.
RW 0x0
4 cfg_exit_pdn_for_dqstrk
iohmc_ctrl_mmr_top_inst.cfg_exit_pdn_for_dqstrk
Name:Exit Power Down For Periodic DQS
Description:When asserted, Periodic DQS Tracking has higher priority compared to Power Down.
RW 0x0
3:0 cfg_no_of_ref_for_self_rfsh
iohmc_ctrl_mmr_top_inst.cfg_no_of_ref_for_self_rfsh[3:0]
Name:No of Refresh prior to Self Refresh Entry
Description:Configure the number of Refresh prior to Self Refresh Entry.
RW 0x0