dma_tbu_m_I_main_QosGenerator_Id_RevisionId

         DMA TBU QoS Generator Revision ID Register
      
Module Instance Base Address Register Address
i_noc_ccu_ios_dma_tbu_m_I_main_QosGenerator 0xFFD24080 0xFFD24084

Size: 32

Offset: 0x4

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

FLEXNOCID

RO 0x148

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

FLEXNOCID

RO 0x148

USERID

RO 0x0

dma_tbu_m_I_main_QosGenerator_Id_RevisionId Fields

Bit Name Description Access Reset
31:8 FLEXNOCID
Field containing the build revision of the software used to generate the IP HDL code.
RO 0x148
7:0 USERID
Field containing a user defined value, not used anywhere inside the IP itself.
RO 0x0