IC_CLR_ACTIVITY

         Name: Clear ACTIVITY Interrupt Register
Size: 1 bit
Address Offset: 0x5c
Read/Write Access: Read
      
Module Instance Base Address Register Address
sdm_i2c_0_DW_apb_i2c_addr_block0 0xFF8D0100 0xFF8D015C
sdm_i2c_1_DW_apb_i2c_addr_block1 0xFF8D0200 0xFF8D025C

Size: 32

Offset: 0x5C

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_ACTIVITY

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_ACTIVITY

RO 0x0

CLR_ACTIVITY

RO 0x0

IC_CLR_ACTIVITY Fields

Bit Name Description Access Reset
31:1 RSVD_IC_CLR_ACTIVITY
Reserved bits - Read Only
RO 0x0
0 CLR_ACTIVITY
Reading this register clears the ACTIVITY
interrupt if the I2C is not active anymore. If the
I2C module is still active on the bus, the ACTIVITY
interrupt bit continues to be set. It is automatically
cleared by hardware if the module is disabled and if
there is no further activity on the bus. The value read
from this register to get status of the ACTIVITY interrupt
(bit 8) of the IC_RAW_INTR_STAT register.
Reset value: 0x0
RO 0x0