reg_sideband8
Sideband 8 Register
| Module Instance | Base Address | Register Address |
|---|---|---|
| iohmc_ctrl_inst_0_iohmc_ctrl_mmr_top_inst | 0xF8010000 | 0xF80100CC |
Size: 32
Offset: 0xCC
Access: RO
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
|
Reserved |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|
Reserved |
mmr_zqcal_ack RO 0x0 |
||||||||||||||
reg_sideband8 Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 0 | mmr_zqcal_ack |
iohmc_ctrl_mmr_top_inst.mmr_zqcal_ack Name:ZQCAL Acknowlege Description:Acknowledge signal for ZQ calibration request. When asserted indicates ZQ Calibration is in progress. Asserts when ZQ Calibration is sent out to PHY until tZQoper(t_param_zqcl_period)/tZQCS(t_param_zqcs_period) is fulfilled. |
RO | 0x0 |