DTHRCTL

         Device Threshold Control Register

Module Instance	Base Address	Register Address
`i_usbotg_0_DWC_otg_intreg`	`0xFFB00000`	`0xFFB00830`
`i_usbotg_1_DWC_otg_intreg`	`0xFFB40000`	`0xFFB40830`

Size: 32

Offset: 0x830

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`RESERVED` `RO 0x0`				`ArbPrkEn` `RW 0x1`	`RESERVED1` `RO 0x1`	`RxThrLen` `RW 0x8`									`RxThrEn` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`RESERVED2` `RO 0x0`			`AHBThrRatio` `RW 0x0`		`TxThrLen` `RW 0x8`									`ISOThrEn` `RW 0x0`	`NonISOThrEn` `RW 0x0`

DTHRCTL Fields

Bit

Name

Description

Access

Reset

31:28

RESERVED

RESERVED

RO

0x0

ArbPrkEn

Arbiter Parking Enable (ArbPrkEn)
This bit controls internal DMA arbiter parking For IN endpoints. When
thresholding is enabled and this bit is Set to one, Then the arbiter parks on the
IN endpoint For which there is a token received on the USB. This is done to
avoid getting into underrun conditions. By Default the parking is enabled.

Value	Description
0x0	Disable DMA arbiter parking
0x1	Enable DMA arbiter parking for IN endpoints

RW

0x1

RESERVED1

RESERVED

RO

0x1

25:17

RxThrLen

Receive Threshold Length (RxThrLen)
This field specifies Receive thresholding size in DWORDS.
This field also specifies the amount of data received on the USB before the
core can start transmitting on the AHB.
The threshold length has to be at least eight DWORDS.
The recommended value For ThrLen is to be the same as the programmed
AHB Burst Length (GAHBCFG.HBstLen).

RW

0x8

RxThrEn

Receive Threshold Enable (RxThrEn)
When this bit is set, the core enables thresholding in the receive direction.
Note: We recommends that you do not enable RxThrEn, because it may cause
issues in the RxFIFO especially during error conditions such as RxError and Babble.

Value	Description
0x0	Disable thresholding
0x1	Enable thresholding in the receive direction

RW

0x0

15:13

RESERVED2

RESERVED

RO

0x0

12:11

AHBThrRatio

AHB Threshold Ratio (AHBThrRatio)
These bits define the ratio between the AHB threshold and the MAC threshold for the
transmit path only. The AHB threshold always remains less than or equal to the USB
threshold, because this does not increase overhead. Both the AHB and the MAC
threshold must be DWORD-aligned. The application needs to program TxThrLen and the
AHBThrRatio to make the AHB Threshold value DWORD aligned. If the AHB threshold
value is not DWORD aligned, the core might not behave correctly. When programming
the TxThrLen and AHBThrRatio, the application must ensure that the minimum AHB
threshold value does not go below 8 DWORDS to meet the USB turnaround time
requirements.
 2'b00: AHB threshold = MAC threshold
 2'b01: AHB threshold = MAC threshold / 2
 2'b10: AHB threshold = MAC threshold / 4
 2'b11: AHB threshold = MAC threshold / 8

Value	Description
0x0	AHB threshold = MAC threshold
0x1	AHB threshold = MAC threshold /2
0x2	AHB threshold = MAC threshold /4
0x3	AHB threshold = MAC threshold /8

RW

0x0

10:2

TxThrLen

Transmit Threshold Length (TxThrLen)
This field specifies Transmit thresholding size in DWORDS. This also forms 
the MAC threshold and specifies the amount of data in bytes to be in the 
corresponding endpoint transmit FIFO, before the core can start transmit 
on the USB. The threshold length has to be at least eight DWORDS when the 
value of AHBThrRatio is 2'h00. In case the AHBThrRatio is non zero the 
application needs to ensure that the AHB Threshold value does not go below 
the recommended eight DWORD.  This field controls both isochronous and 
non-isochronous IN endpoint thresholds. The recommended value for ThrLen 
is to be the same as the programmed AHB Burst Length (GAHBCFG.HBstLen).

RW

0x8

ISOThrEn

ISO IN Endpoints Threshold Enable. (ISOThrEn)
When this bit is Set, the core enables thresholding For isochronous IN
endpoints.

Value	Description
0x0	No thresholding
0x1	Enables thresholding for isochronous IN endpoints

RW

0x0

NonISOThrEn

Non-ISO IN Endpoints Threshold Enable. (NonISOThrEn)
When this bit is Set, the core enables thresholding For Non Isochronous IN
endpoints.

Value	Description
0x0	No thresholding
0x1	Enable thresholding for non-isochronous IN endpoints

RW

0x0