modebit
| Module Instance | Base Address | Register Address |
|---|---|---|
| sdm_qspi_qspiregs | 0xFF8D2000 | 0xFF8D2028 |
Size: 32
Offset: 0x28
Access: RW
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
|
mode_resv_fld RO 0x0 |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|
mode_resv_fld RO 0x0 |
mode RW 0x0 |
||||||||||||||
modebit Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 31:8 | mode_resv_fld | RO | 0x0 | |
| 7:0 | mode |
These are the 8 mode bits that are sent to the device following the address bytes if mode bit transmission has been enabled. |
RW | 0x0 |