gmacgrp_timestamp_addend

         This register value is used only when the system time is configured for Fine Update mode (TSCFUPDT bit in Register 448). This register content is added to a 32-bit accumulator in every clock cycle (of clk_ptp_ref_i) and the system time is updated whenever the accumulator overflows.

Module Instance	Base Address	Register Address
`i_emac_emac0`	`0xFF800000`	`0xFF800718`
`i_emac_emac1`	`0xFF802000`	`0xFF802718`
`i_emac_emac2`	`0xFF804000`	`0xFF804718`

Size: 32

Offset: 0x718

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`tsar` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`tsar` `RW 0x0`

gmacgrp_timestamp_addend Fields

Bit	Name	Description	Access	Reset
31:0	`tsar`	This field indicates the 32-bit time value to be added to the Accumulator register to achieve time synchronization.	`RW`	`0x0`