iir

         Interrupt Identification Register
      
Module Instance Base Address Register Address
i_uart_0_uart_address_block 0xFFC02000 0xFFC02008
i_uart_1_uart_address_block 0xFFC02100 0xFFC02108

Size: 32

Offset: 0x8

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

rsvd_iir_31to8

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

rsvd_iir_31to8

RO 0x0

fifoen

RO 0x0

rsvd_iir_5to4

RO 0x0

id

RO 0x1

iir Fields

Bit Name Description Access Reset
31:8 rsvd_iir_31to8
Reserved bits [31:8] - Read Only
RO 0x0
7:6 fifoen
Bits[7:6], FIFO's Enabled (or FIFOSE):
This is used to indicate whether the FIFO's are enabled or disabled.
00 = disabled.
11 = enabled
Value Description
0 FIFO disabled
3 FIFO enabled
RO 0x0
5:4 rsvd_iir_5to4
Reserved bits [5:4] - Read Only
RO 0x0
3:0 id
Bits[3:0], Interrupt ID (or IID):
This indicates the highest priority pending interrupt which can be one of the
following types:
0000 = modem status.
0001 = no interrupt pending.
0010 = THR empty.
0100 = received data available.
0110 = receiver line status.
0111 = busy detect.
1100 = character timeout.
Note, an interrupt of type 0111 (busy detect) will never get indicated if
UART_16550_COMPATIBLE == YES in coreConsultant.
Value Description
0 Modem status
1 No Interrupt pending
2 THR empty
4 Receive data available
6 Receive line status
7 Busy detect
12 Character timeout
RO 0x1