gmacgrp_mac_address10_high

          Register 36 (MAC Address10 High Register)   

The MAC Address10 High register holds the upper 16 bits of the 11th 6-byte MAC address of the station.
If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains, then the synchronization is triggered only when Bits[31:24] (in little-endian mode) or Bits[7:0] (in big-endian mode) of the MAC Address10 Low Register are written. For proper synchronization updates, the consecutive writes to this MAC Address10 Low Register should be performed after at least four clock cycles in the destination clock domain.

Module Instance	Base Address	Register Address
`i_emac_emac0`	`0xFF800000`	`0xFF800090`
`i_emac_emac1`	`0xFF802000`	`0xFF802090`
`i_emac_emac2`	`0xFF804000`	`0xFF804090`

Size: 32

Offset: 0x90

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`ae` `RW 0x0`	`sa` `RW 0x0`	`mbc_5` `RW 0x0`	`mbc_4` `RW 0x0`	`mbc_3` `RW 0x0`	`mbc_2` `RW 0x0`	`mbc_1` `RW 0x0`	`mbc_0` `RW 0x0`	`reserved_23_16` `RO 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`addrhi` `RW 0xFFFF`

gmacgrp_mac_address10_high Fields

Bit

Name

Description

Access

Reset

ae

Address Enable

When this bit is set, the address filter module uses the 11th MAC address for perfect filtering. When this bit is reset, the address filter module ignores the address for filtering.

Value	Description
0x0	DISABLED
0x1	ENABLED

RW

0x0

sa

Source Address

When this bit is set, the MAC Address10[47:0] is used to compare with the SA fields of the received frame. When this bit is reset, the MAC Address10[47:0] is used to compare with the DA fields of the received frame.

Value	Description
0x0	DISABLED
0x1	ENABLED

RW

0x0

mbc_5

This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address10 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address.
The array index corresponds to the byte (e.g. index 0 is for bits 7:0).

Value	Description
0x0	UNMASKED
0x1	MASKED

RW

0x0

mbc_4

This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address10 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address.
The array index corresponds to the byte (e.g. index 0 is for bits 7:0).

Value	Description
0x0	UNMASKED
0x1	MASKED

RW

0x0

mbc_3

This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address10 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address.
The array index corresponds to the byte (e.g. index 0 is for bits 7:0).

Value	Description
0x0	UNMASKED
0x1	MASKED

RW

0x0

mbc_2

This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address10 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address.
The array index corresponds to the byte (e.g. index 0 is for bits 7:0).

Value	Description
0x0	UNMASKED
0x1	MASKED

RW

0x0

mbc_1

This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address10 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address.
The array index corresponds to the byte (e.g. index 0 is for bits 7:0).

Value	Description
0x0	UNMASKED
0x1	MASKED

RW

0x0

mbc_0

This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address10 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address.
The array index corresponds to the byte (e.g. index 0 is for bits 7:0).

Value	Description
0x0	UNMASKED
0x1	MASKED

RW

0x0

23:16

reserved_23_16

Reserved

RO

0x0

15:0

addrhi

MAC Address10 [47:32]

This field contains the upper 16 bits (47:32) of the 11th 6-byte MAC address.

RW

0xFFFF