DIEPCTL2

Endpoint Enable (EPEna)
 Applies to IN and OUT endpoints.
 When Scatter/Gather DMA mode is enabled,
 For IN endpoints this bit indicates that the descriptor structure and data buffer with
data ready to transmit is setup.
 For OUT endpoint it indicates that the descriptor structure and data buffer to
receive data is setup.
 When Scatter/Gather DMA mode is enabled such as for buffer-pointer based
DMA mode:
- For IN endpoints, this bit indicates that data is ready to be transmitted on the
endpoint.
- For OUT endpoints, this bit indicates that the application has allocated the
memory to start receiving data from the USB.
- The core clears this bit before setting any of the following interrupts on this
endpoint:
 SETUP Phase Done
 Endpoint Disabled
 Transfer Completed
Note: For control endpoints in DMA mode, this bit must be set to be able to transfer
SETUP data packets in memory.

Endpoint Disable (EPDis)
Applies to IN and OUT endpoints.
The application sets this bit to stop transmitting/receiving data on an endpoint, even
before the transfer for that endpoint is complete. The application must wait for the
Endpoint Disabled interrupt before treating the endpoint as disabled. The core clears
this bit before setting the Endpoint Disabled interrupt. The application must set this bit
only if Endpoint Enable is already set for this endpoint.

Set DATA1 PID (SetD1PID)
	Applies to interrupt/bulk IN and OUT endpoints only.
Writing to this field sets the Endpoint Data PID (DPID) field in this register to DATA1.
This field is applicable both for Scatter/Gather DMA mode and non-Scatter/Gather
DMA mode.

Set Odd (micro)frame (SetOddFr)
Applies to isochronous IN and OUT endpoints only.
Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to odd
(micro)frame.
This field is not applicable for Scatter/Gather DMA mode.

	Set DATA0 PID (SetD0PID)
Applies to interrupt/bulk IN and OUT endpoints only.
Writing to this field sets the Endpoint Data PID (DPID) field in this register to DATA0.
This field is applicable both for Scatter/Gather DMA mode and non-Scatter/Gather
DMA mode.
1'b0 WO
In non-Scatter/Gather DMA mode: Set Even (micro)frame (SetEvenFr)
Applies to isochronous IN and OUT endpoints only.
Writing to this field sets the Even/Odd (micro)frame (EO_FrNum) field to even (micro)
frame.
When Scatter/Gather DMA mode is enabled, this field is reserved. The frame number
in which to send data is in the transmit descriptor structure. The frame in which to
receive data is updated in receive descriptor structure.

Set NAK (SNAK)
A write to this bit sets the NAK bit For the endpoint.
Using this bit, the application can control the transmission of NAK
handshakes on an endpoint. The core can also Set this bit For an
endpoint after a SETUP packet is received on that endpoint.

Clear NAK (CNAK)
A write to this bit clears the NAK bit For the endpoint.

TxFIFO Number (TxFNum)
Shared FIFO Operation non-periodic endpoints must set this bit to zero. Periodic
endpoints must map this to the corresponding Periodic TxFIFO number.
 4'h0: Non-Periodic TxFIFO
 Others: Specified Periodic TxFIFO.number
Note: An interrupt IN endpoint can be configured as a non-periodic endpoint for
applications such as mass storage. The core treats an IN endpoint as a non-periodic
endpoint if the TxFNum field is set to 0. Otherwise, a separate periodic FIFO must be
allocated for an interrupt IN endpoint, and the number of this
FIFO must be programmed into the TxFNum field. Configuring an interrupt IN
endpoint as a non-periodic endpoint saves the extra periodic FIFO area.
Dedicated FIFO Operationthese bits specify the FIFO number associated with this
endpoint. Each active IN endpoint must be programmed to a separate FIFO number.
This field is valid only for IN endpoints.

STALL Handshake (Stall)
Applies to non-control, non-isochronous IN and OUT endpoints only.
The application sets this bit to stall all tokens from the USB host to this endpoint. If a
NAK bit, Global Non-periodic IN NAK, or Global OUT NAK is set along with this bit, the
STALL bit takes priority. Only the application can clear this bit, never the core.
1'b0 R_W
Applies to control endpoints only.
The application can only set this bit, and the core clears it, when a SETUP token is
received for this endpoint. If a NAK bit, Global Non-periodic IN NAK, or Global OUT
NAK is set along with this bit, the STALL bit takes priority. Irrespective of this bit's
setting, the core always responds to SETUP data packets with an ACK handshake.

Endpoint Type (EPType)
This is the transfer type supported by this logical endpoint.
 2'b00: Control
 2'b01: Isochronous
 2'b10: Bulk
 2'b11: Interrupt

NAK Status (NAKSts)
Indicates the following:
 1'b0: The core is transmitting non-NAK handshakes based on the FIFO status.
 1'b1: The core is transmitting NAK handshakes on this endpoint.
When either the application or the core sets this bit:
 The core stops receiving any data on an OUT endpoint, even if there is space in
the RxFIFO to accommodate the incoming packet.
 For non-isochronous IN endpoints: The core stops transmitting any data on an IN
endpoint, even if there data is available in the TxFIFO.
 For isochronous IN endpoints: The core sends out a zero-length data packet, even
if there data is available in the TxFIFO.
Irrespective of this bit's setting, the core always responds to SETUP data packets with
an ACK handshake.

	Endpoint Data PID (DPID)
Applies to interrupt/bulk IN and OUT endpoints only.
Contains the PID of the packet to be received or transmitted on this endpoint. The
application must program the PID of the first packet to be received or transmitted on
this endpoint, after the endpoint is activated. The applications use the SetD1PID and
SetD0PID fields of this register to program either DATA0 or DATA1 PID.
 1'b0: DATA0
 1'b1: DATA1
This field is applicable both for Scatter/Gather DMA mode and non-Scatter/Gather
DMA mode.
1'b0 RO
Even/Odd (Micro)Frame (EO_FrNum)
In non-Scatter/Gather DMA mode:
Applies to isochronous IN and OUT endpoints only.
Indicates the (micro)frame number in which the core transmits/receives isochronous
data for this endpoint. The application must program the even/odd (micro) frame
number in which it intends to transmit/receive isochronous data for this endpoint using
the SetEvnFr and SetOddFr fields in this register.
 1'b0: Even (micro)frame
 1'b1: Odd (micro)frame
When Scatter/Gather DMA mode is enabled, this field is reserved. The frame number
in which to send data is provided in the transmit descriptor structure. The frame in
which data is received is updated in receive descriptor structure.	

USB Active Endpoint (USBActEP)
Indicates whether this endpoint is active in the current configuration and interface. The
core clears this bit for all endpoints (other than EP 0) after detecting a USB reset. After
receiving the SetConfiguration and SetInterface commands, the application must
program endpoint registers accordingly and set this bit.

Maximum Packet Size (MPS)
The application must program this field with the maximum packet size for the current
logical endpoint. This value is in bytes.