reg_sideband11
Sideband 11 Register
Module Instance | Base Address | Register Address |
---|---|---|
iohmc_ctrl_inst_0_iohmc_ctrl_mmr_top_inst | 0xF8010000 | 0xF80100D8 |
Size: 32
Offset: 0xD8
Access: RO
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
|||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
mmr_auto_pd_ack RO 0x0 |
reg_sideband11 Fields
Bit | Name | Description | Access | Reset |
---|---|---|---|---|
0 | mmr_auto_pd_ack |
iohmc_ctrl_mmr_top_inst.mmr_auto_pd_ack Name:Auto Power Down Acknowlege Description:Acknowledge signal for auto power down. 1 indicating memory is in APD mode. |
RO | 0x0 |