Hard_Memory_Ctrlr_DDRMemoryData_4G Address Map
Address range for external DDR memory. This range represents the first 4GB of the 128 GB DDR space. The other 124 GB is represented by the soc_hmc_adaptor_inst_0_adp_mem_data_124G instance which you can configure to one of five different base addresses. Note that the ARM Cortex-A53, L3 interconnect peripherals and SDM can only access the first 2 GB of this 4 GB region (0x0 to 0x7FFFFFFF). Only the FPGA-to-SDRAM bridge has the capability of accessing the entire 4 GB of this address range (0x0 to 0xFFFFFFFF).
| Module Instance | Base Address | End Address |
|---|---|---|
| soc_hmc_adaptor_inst_0_adp_mem_data | 0x0 | 0xFFFFFFFF |