Control_Status Summary

Registers in the Clock Manager module

Base Address: 0xFFD10000

Register

Address Offset

Bit Fields
i_clk_mgr_clkmgr

ctrl

0x0

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

swctrlbtclksel

RW 0x0

swctrlbtclken

RW 0x0

Reserved

bootmode

RW 0x1

stat

0x4

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

bootclksrc

RO 0x0

bootmode

RO 0x1

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

perplllocked

RO 0x0

mainplllocked

RO 0x0

Reserved

busy

RO 0x0

testioctrl

0x8

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

debugclksel

RW 0x0

Reserved

periclksel

RW 0x0

Reserved

mainclksel

RW 0x0

intrgen

0xC

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

en

RW 0x0

intrmsk

0x10

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

perlocklost

0x0

mainlocklost

0x0

perlockachieved

0x0

mainlockachieved

0x0

intrclr

0x14

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

perlocklost

0x0

mainlocklost

0x0

perlockachieved

0x0

mainlockachieved

0x0

intrsts

0x18

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

perlocklost

0x0

mainlocklost

0x0

perlockachieved

0x0

mainlockachieved

0x0

intrstk

0x1C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

perlocklost

0x0

mainlocklost

0x0

perlockachieved

0x0

mainlockachieved

0x0

intrraw

0x20

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

perlocklost

0x0

mainlocklost

0x0

perlockachieved

0x0

mainlockachieved

0x0