permodrst

The PERMODRST register is used by software to trigger module resets (individual module reset signals). Software explicitly asserts and de-asserts module reset signals by writing bits in the appropriate *MODRST register. It is up to software to ensure module reset signals are asserted for the appropriate length of time and are de-asserted in the correct order. It is also up to software to not assert a module reset signal that would prevent software from de-asserting the module reset signal. For example, software should not assert the module reset to the CPU executing the software. Software writes a bit to 1 to assert the module reset signal and to 0 to de-assert the module reset signal. All fields are reset by a warm or cold reset. The reset value of all fields is 1. This holds the corresponding module in reset until software is ready to release the module from reset by writing 0 to its field.
Module Instance Base Address Register Address
rstmgr 0xFFD05000 0xFFD05014

Offset: 0x14

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

sdr

RW 0x1

dma

RW 0x1

gpio2

RW 0x1

gpio1

RW 0x1

gpio0

RW 0x1

Reserved

Reserved

sdmmc

RW 0x1

spis1

RW 0x1

spis0

RW 0x1

spim1

RW 0x1

spim0

RW 0x1

uart1

RW 0x1

uart0

RW 0x1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

i2c3

RW 0x1

i2c2

RW 0x1

i2c1

RW 0x1

i2c0

RW 0x1

sptimer1

RW 0x1

sptimer0

RW 0x1

osc1timer1

RW 0x1

osc1timer0

RW 0x1

l4wd1

RW 0x1

l4wd0

RW 0x1

qspi

RW 0x1

nand

RW 0x1

usb1

RW 0x1

usb0

RW 0x1

emac1

RW 0x1

emac0

RW 0x1

permodrst Fields

Bit Name Description Access Reset
29 sdr

Resets SDRAM Controller Subsystem affected by a warm or cold reset.

 RW 0x1
28 dma

Resets DMA controller

 RW 0x1
27 gpio2

Resets GPIO2

 RW 0x1
26 gpio1

Resets GPIO1

 RW 0x1
25 gpio0

Resets GPIO0

 RW 0x1
22 sdmmc

Resets SD/MMC controller

 RW 0x1
21 spis1

Resets SPIS1 controller

 RW 0x1
20 spis0

Resets SPIS0 controller

 RW 0x1
19 spim1

Resets SPIM1 controller

 RW 0x1
18 spim0

Resets SPIM0 controller

 RW 0x1
17 uart1

Resets UART1

 RW 0x1
16 uart0

Resets UART0

 RW 0x1
15 i2c3

Resets I2C3 controller

 RW 0x1
14 i2c2

Resets I2C2 controller

 RW 0x1
13 i2c1

Resets I2C1 controller

 RW 0x1
12 i2c0

Resets I2C0 controller

 RW 0x1
11 sptimer1

Resets SP timer 1 connected to L4

 RW 0x1
10 sptimer0

Resets SP timer 0 connected to L4

 RW 0x1
9 osc1timer1

Resets OSC1 timer 1 connected to L4

 RW 0x1
8 osc1timer0

Resets OSC1 timer 0 connected to L4

 RW 0x1
7 l4wd1

Resets watchdog 1 connected to L4

 RW 0x1
6 l4wd0

Resets watchdog 0 connected to L4

 RW 0x1
5 qspi

Resets QSPI flash controller

 RW 0x1
4 nand

Resets NAND flash controller

 RW 0x1
3 usb1

Resets USB1

 RW 0x1
2 usb0

Resets USB0

 RW 0x1
1 emac1

Resets EMAC1

 RW 0x1
0 emac0

Resets EMAC0

 RW 0x1